This relates to serial communications links and, more particularly, to serial communications links with bonded first-in-first-out buffer circuitry.
Serial communications are often used in modern electronics systems. Serial communications can be faster than parallel communications, use fewer pins, and, particularly when differential signaling schemes are used, can have higher noise immunity.
It can be challenging to handle serial data streams at high data rates (e.g., at data rates above several Gbps). As a result, it is often advantageous to support high-speed serial data communications using multiple smaller serial data paths operating in parallel. These smaller serial data paths are often referred to as “lanes.”
The efficiency of communications circuitry is often measured by how efficiently the circuitry performs in worst-case scenarios. For example, the efficiency of communications circuitry having a 256 bit bus is often measured when the circuitry is conveying 65 bytes packets. One measure of the efficiency of the communications circuitry is how many data bytes conveyed over the bus are empty. Another measure of the efficiency of the communications circuitry is how many data bytes stored in buffer circuitry are empty. Unbonded lanes and unbonded buffer circuitry are commonly used in conventional serial communications circuitry, but are inefficient in these types of worst-case scenarios. These inefficiencies increase the cost of the communications circuitry by requiring additional memory capacity in buffer circuitry and increased bus frequencies to achieve high data rates.
It would therefore be desirable to be able to provide communications circuitry with enhanced efficiencies.